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ON-CHIP REGISTERS
These are memory locations used inside the H8/532
microprocessor chip. Full details on how they are used can be found in Hardware Manual, appendix B. For example, to configure one of the spare parallel ports
(Port 7) for input on bits 0-3 and output on bits 4-7 type
$F0 $FF8C C! . This writes data hex F0 to address FF8C, the
data direction register for the port.
NOTES
q
The last column shows data initialised at reset by
either the microprocessor chip hardware or the Forth system.
q
R=Read only register W=Write only register (data read
back will be meaningless)
q
R/W=Read/Write register. Some bits are exceptions to
the Read/Write capability shown. See Hardware Manual.
I/O Ports
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FF80
|
Port 1 Data Direction
Register
|
P1DDR
|
W
|
0E
|
FF82
|
Port 1 Data Register
|
P1DR
|
R/W
|
06
|
FF8C
|
Port 7 Data Direction
Register
|
P7DDR
|
W
|
00
|
FF8E
|
Port 7 Data Register
|
P7DR
|
R/W
|
00
|
FF8F
|
Port 8 Data Register
|
P8DR
|
R
|
-
|
FFFC
|
Port 1 Control
Register
|
P1CR
|
R/W
|
87
|
FFFE
|
Port 9 Data Direction
Register
|
P9DDR
|
W
|
21
|
FFFF
|
Port 9 Data Register
|
P9DR
|
R/W
|
21
|
Free Running Timer 1 FRT1
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FF90
|
Timer Control Register
|
TCR
|
R/W
|
00
|
FF91
|
Timer Control/Status
Register
|
TCSR
|
R/W
|
00
|
FF92/FF93
|
Free Running Counter
|
FRC
|
R/W
|
00
|
FF94/FF95
|
Output Compare Register A
|
OCRA
|
R/W
|
FF
|
FF96/FF97
|
Output Compare Register B
|
OCRB
|
R/W
|
FF
|
FF98/FF99
|
Input Capture Register
|
ICR
|
R
|
00
|
Free Running Timer 2 FRT2
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFA0
|
Timer Control Register
|
TCR
|
R/W
|
00
|
FFA1
|
Timer Control/Status
Register
|
TCSR
|
R/W
|
00
|
FFA2/FFA3
|
Free Running Counter
|
FRC
|
R/W
|
00
|
FFA4/FFA5
|
Output Compare Register A
|
OCRA
|
R/W
|
FF
|
FFA6/FFA7
|
Output Compare Register B
|
OCRB
|
R/W
|
FF
|
FFA8/FFA9
|
Input Capture Register
|
ICR
|
R
|
00
|
Free Running Timer 3 FRT3
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFB0
|
Timer Control Register
|
TCR
|
R/W
|
00
|
FFB1
|
Timer Control/Status
Register
|
TCSR
|
R/W
|
00
|
FFB2/FFB3
|
Free Running Counter
|
FRC
|
R/W
|
00
|
FFB4/FFB5
|
Output Compare Register A
|
OCRA
|
R/W
|
FF
|
FFB6/FFB7
|
Output Compare Register B
|
OCRB
|
R/W
|
FF
|
FFB8/FFB9
|
Input Capture Register
|
ICR
|
R
|
00
|
D to A Converter 1 PWM1
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFC0
|
Timer Control Register
|
TCR
|
R/W
|
38
|
FFC1
|
Duty Register
|
DTR
|
R/W
|
FF
|
FFC2
|
Timer Counter
|
TCNT
|
R
|
00
|
D to A Converter 2 PWM2
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFC4
|
Timer Control Register
|
TCR
|
R/W
|
38
|
FFC5
|
Duty Register
|
DTR
|
R/W
|
FF
|
FFC6
|
Timer Counter
|
TCNT
|
R
|
00
|
D to A Converter 3 PWM3
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFC8
|
Timer Control Register
|
TCR
|
R/W
|
38
|
FFC9
|
Duty Register
|
DTR
|
R/W
|
FF
|
FFCA
|
Timer Counter
|
TCNT
|
R
|
00
|
8-bit Timer TMR
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFD0
|
Timer Control Register
|
TCR
|
R/W
|
00
|
FFD1
|
Timer Control/Status
Register
|
TCSR
|
R/W
|
10
|
FFD2
|
Timer Constant Register A
|
TCORA
|
R/W
|
FF
|
FFD3
|
Timer Constant Register B
|
TCORB
|
R/W
|
FF
|
FFD4
|
Timer Counter
|
TCNT
|
R/W
|
00
|
Serial Communications SCI
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFD8
|
Serial Mode Register
|
SMR
|
R/W
|
04
|
FFD9
|
Bit Rate Register
|
BRR
|
R/W
|
FF
|
FFDA
|
Serial Control Register
|
SCR
|
R/W
|
0C
|
FFDB
|
Transmit Data Register
|
TDR
|
R/W
|
FF
|
FFDC
|
Serial Status Register
|
SSR
|
R
|
87
|
FFDD
|
Receive Data Register
|
RDR
|
R
|
00
|
Analog to Digital Converter A/D
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFE0/FFE1
|
A/D Data Register A
|
ADDRA
|
R
|
00
|
FFE2/FFE3
|
A/D Data Register B
|
ADDRB
|
R
|
00
|
FFE4/FFE5
|
A/D Data Register C
|
ADDRC
|
R
|
00
|
FFE6/FFE7
|
A/D Data Register D
|
ADDRD
|
R
|
00
|
FFE8
|
A/D Control/Status Register
|
ADCSR
|
R/W
|
00
|
Internal Watchdog Timer WDT
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFEC
|
Timer Status/Control
Register
|
TCSR
|
R/W
|
18
|
FFED
|
Timer Counter
|
TCNT
|
R/W
|
00
|
Interrupt Control INTC
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFF0
|
Interrupt priority Register
A
|
IPRA
|
R/W
|
00
|
FFF1
|
Interrupt priority Register
B
|
IPRB
|
R/W
|
00
|
FFF2
|
Interrupt priority Register
C
|
IPRC
|
R/W
|
00
|
FFF3
|
Interrupt priority Register
D
|
IPRD
|
R/W
|
00
|
FFF4
|
Data Transfer Enable
Register A
|
DTEA
|
R/W
|
00
|
FFF5
|
Data Transfer Enable Register
B
|
DTEB
|
R/W
|
00
|
FFF6
|
Data Transfer Enable
Register C
|
DTEC
|
R/W
|
00
|
FFF7
|
Data Transfer Enable Register D
|
DTED
|
R/W
|
00
|
Miscellaneous
Addr.
|
Register
|
Abbr.
|
R/W
|
Init.
|
FFF8
|
Wait State Control Register
|
WCR
|
R/W
|
F3
|
FFF9
|
RAM Control Register
|
RAM
|
R/W
|
FF
|
FFFA
|
Mode Control Register
|
MDCR
|
R
|
C3/C4
|
FFFB
|
Software Standby Control Register
|
SBYCR
|
R/W
|
7F
|
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