DIGITAL TO ANALOG

DEFINITIONS

DESCRIPTION

At power-up bits 2 3 & 4 of Port 9 are configured as general-purpose I/O ports. To use them as 3 channels of 8-bit D to A call the word D-A provided. This sets up the necessary registers to make these bits into D to A outputs and starts the Pulse Width Modulated output at 19.6608kHz.

For example 40 2 D-A will produce a repetitive asymmetrical wave at this frequency with a mark:space ratio of 40:210 (ratio of time at +5V to time at 0V). An external filter is added to get the analog level, in the example the analog output would be 5.00 x 40/250 = 0.80V.

D to A output buffer & filter suggestion
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The filter can be as simple as an RC network (10k and 1�0 recommended) or the filtering may form part of subsequent signal conditioning (the output impedance of the pins is typically 140 ohms). The circuit shows a typical second order filter that gives a response time of about 2ms to step inputs.

The word D-A takes a channel number 0 to 2 to be in line with Forth (where all counts start from 0) but for consistency with Hitachi documentation the pin names are PW1 to PW3. In the example the PWM output will appear on pin PW3 since channel 2 was selected.

By accessing internal registers of the PWM system the frequency can be changed to any of the following, see the Hardware Manual Section 12 for details:

Apart from its D to A use, these outputs can be useful as a source of real-time clock waveforms.